处理器：Hi3531dv200sdk：Hi3531DV200R001C02SPC003 目的：VGA输入经AD芯片转换成bt1120然后对接海思 现象：从VI抓图发现没有UV得数据，测量uv data管脚是有时序得。vi配置如下： hi_vi_dev_attr DEV_ATTR_BT1120_1080P_1MUX_CV8988 = { /* interface mode */ HI_VI_MODE_BT1120_STANDARD, /* work mode, 1/2/4 multiplex */ HI_VI_WORK_MODE_MULTIPLEX_1, /* r_mask g_mask b_mask */ //{ 0xff000,0xff0}, { 0xff0,0xff000 }, /* for single/double edge, must be set when double edge */ HI_VI_CLK_EDGE_SINGLE_UP, /* enDataSeq, just support yuv */ HI_VI_IN_DATA_UVUV, /* sync info */ { /* port_vsync port_vsync_neg port_hsync port_hsync_neg */ HI_VI_VSYNC_FIELD, HI_VI_VSYNC_NEG_HIGH, HI_VI_HSYNC_VALID_SIG, HI_VI_HSYNC_NEG_HIGH, HI_VI_VSYNC_VALID_SIG, HI_VI_VSYNC_VALID_NEG_HIGH, /* * timing info: * hsync_hfb hsync_act hsync_hhb * vsync0_vhb vsync0_act vsync0_hhb * vsync1_vhb vsync1_act vsync1_hhb */ { 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, /* data_reverse_en */ HI_FALSE, /* mixed_capture_en */ HI_FALSE,};hi_vi_chn_attr VI_1080P_VGA = { /* crop_x crop_y, crop_w crop_h */ { 0, 0, 1920, 1080 }, /* dest_w dest_h */ { 1920, 1080 }, /* capture_select */ HI_VI_CAPTURE_SELECT_BOTH, /* scan mode */ HI_VI_SCAN_PROGRESSIVE, /* pixel_format */ HI_PIXEL_FORMAT_YVU_SEMIPLANAR_422, /* mirror_en flip_en */ 0, 0, /* compress mode */ HI_COMPRESS_MODE_NONE, /* src_frame_rate dst_frame_rate */ -1, -1}; 附件是VI通道抓图数据

问题描述：使用rtp接收H264数据流，打包成完成数据帧送VDEC解码器进行解码，保存的h264文件，通过vlc查看是没有问题的，但是解码显示会出现花屏。 /dev/logmpp信息： <3>[ vdec] [Func]:vdec_event_unsupport [Line]:2472 [Info]:video format unsuport at event chn 0, errcode = a0232103<3>[ vdec] [Func]:vdec_event_dec_err [Line]:2508 [Info]:stream error ,can't decorder at event chn 0, errcode = a0231a0a<3>[ vdec] [Func]:vdec_event_over_refthr [Line]:2490 [Info]:stream error rate 86 larger than set 30 at event chn 0<3>[ vdec] [Func]:vdec_event_over_refthr [Line]:2490 [Info]:stream error rate 60 larger than set 30 at event chn 0 /proc/umap/vdec信息： ~ # cat /proc/umap/vdec[VDEC] Version: [Hi3531DV200_MPP_V2.0.0.3 B040 Release], Build Time[Feb 17 2020, 21:55:06]----------------------------------------module param-------------------------------------------------------------------- vdec_max_chn_num mini_buf_mode vb_src 128 0 1 max_video_width max_video_height max_slice_num vdh_msg_num 8192 8192 600 8 max_pic_width max_pic_height progressive_en dynamic_alloc_en capacity_strategy 16384 16384 0 0 0----------------------------------------chn comm attr & params---------------------------------------------------------- id type max_w max_h width height send_mode str_buf_size frame_buf_size frame_buf_cnt tmv_buf_size 0 H264 1920 1080 1920 1080 FRAME/NOBLOCK 3110400 N/A N/A N/A id display_num display_mode set_user_pic enable_user_pic rotation pic_pool_id tmv_pool_id state 0 5 PLAYBACK N N 0 N/A N/A START----------------------------------------chn video attr & params--------------------------------------------------------- id vfmw_id ref_num tmv_en err_threshold dec_mode out_order compress_mode video_format 0 0 5 Y 30 IPB DEC N TILE id max_vps_num max_sps_num max_pps_num max_slice_segment_num 0 0 16 16 128----------------------------------------chn pic attr & params----------------------------------------------------------- id pixel_format alpha 0 N/A N/A----------------------------------------chn state----------------------------------------------------------------------- id protocol_err stream_unsupport pack_err ref_num_err pic_size_err format_err pic_buf_size_err stream_size_over 0 0 3 10 0 0 0 0 0 id pts_buf_free pts_buf_busy buf_len data_len rd_rgn_len scd_left_len wr_rgn_len 0 199 0 4149216 0 0 0 0 id fps stream_end frame_end timer_cnt notify unique_id state 0 23 0 608 2824 1226 132 1----------------------------------------detail stream state------------------------------------------------------------- id mpi_send_cnt mpi_send_len end_code_cnt end_code_len vfmw_get_cnt vfmw_get_len vfmw_rls_cnt vfmw_rls_len 0 608 9147036 608 9120 1220 9156156 1220 9156156 id vfmw_latest_get_len vfmw_rls_fail_cnt mpi_send_gap 0 30 0 39724000----------------------------------------detail frame store state-------------------------------------------------------- id new_pic get_pic discard no_disp mpi_get kernel_send kernel_rls meet_end frame_in_vdec dynamic_range color_gamut 0 604 604 5 0 0 599 598 608 0 SDR8 BT709 id free_node vfmw_node vgs_node vgs_working_node busy_node user_node ref_num vb_cnt max_vb_cnt rotate_vb_cnt 0 39 0 0 0 0 1 2 2 11 0 id avalible pic_vb_fail tmv_vb_fail rotate_vb_fail pic_size tmv_size rotate_size cur_pic_pts 0 0 0 0 0 3146496 522240 0 0----------------------------------------detail user_data state---------------------------------------------------------- id enable max_user_data_len free_buf_len data_buf_len 0 1 1024 4096 0 id mpi_get_cnt mpi_get_len mpi_rls_cnt mpi_rls_len discard_cnt discard_len vdec_get_cnt vdec_get_len 0 0 0 0 0 0 0 0 0 请各位大神指教！！！

平台：hi3531dv200编译器：aarch64-himix200-linux 驱动部分代码： void txdrv_aublc_factory_set(AUBLC_T *pAublc){ uint32_t i; int16_t r_vhl, b_vhl; float f_val; txcra_iostream_mask((__CONST uint8_t *)&TXREG_AUBLC_INIT_TBL); for (i = 0; i < MAX_AUBLC_BUF_SIZE; i ++) { txcra_iostream_mask((__CONST uint8_t *)&TXREG_AUBLC_RGB_DIS_TBL); txcra_iostream_mask((__CONST uint8_t *)&TXREG_AUBLC_RGB_EN_TBL); g_aublc_rl_buf[i] = txcra_readrange(REG_AUBLC_R_VL, 0, 0x0A); g_aublc_rh_buf[i] = txcra_readrange(REG_AUBLC_R_VH, 0, 0x0A); g_aublc_gl_buf[i] = txcra_readrange(REG_AUBLC_G_VL, 0, 0x0A); g_aublc_gh_buf[i] = txcra_readrange(REG_AUBLC_G_VH, 0, 0x0A); g_aublc_bl_buf[i] = txcra_readrange(REG_AUBLC_B_VL, 0, 0x0A); g_aublc_bh_buf[i] = txcra_readrange(REG_AUBLC_B_VH, 0, 0x0A); } g_aublc_rl_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_rl_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_rh_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_rh_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_gl_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_gl_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_gh_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_gh_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_bl_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_bl_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_bh_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_bh_buf, MAX_AUBLC_BUF_SIZE, 16); r_vhl = (g_aublc_gh_buf[0] - g_aublc_gl_buf[0]) - (g_aublc_rh_buf[0] - g_aublc_rl_buf[0]); b_vhl = (g_aublc_gh_buf[0] - g_aublc_gl_buf[0]) - (g_aublc_bh_buf[0] - g_aublc_bl_buf[0]); f_val = abs(r_vhl); if (r_vhl >= 0) { pAublc->r_gain = 0x80 - f_val / 1.600; } else { pAublc->r_gain = 0x80 + f_val / 1.478; } f_val = abs(b_vhl); if (b_vhl >= 0) { pAublc->b_gain = 0x80 - f_val / 1.600; } else { pAublc->b_gain = 0x80 + f_val / 1.478; } txcra_write(REG_RGBADC_GAINB, pAublc->b_gain); txcra_write(REG_RGBADC_GAINR, pAublc->r_gain); for (i = 0; i < MAX_AUBLC_BUF_SIZE; i ++) { txcra_iostream_mask((__CONST uint8_t *)&TXREG_AUBLC_RGB_DIS_TBL); txcra_iostream_mask((__CONST uint8_t *)&TXREG_AUBLC_RGB_EN_TBL); g_aublc_rm_buf[i] = txcra_readrange(REG_AUBLC_R_VM, 0, 0x0A); g_aublc_gm_buf[i] = txcra_readrange(REG_AUBLC_G_VM, 0, 0x0A); g_aublc_bm_buf[i] = txcra_readrange(REG_AUBLC_B_VM, 0, 0x0A); } g_aublc_rm_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_rm_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_gm_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_gm_buf, MAX_AUBLC_BUF_SIZE, 16); g_aublc_bm_buf[0] = txfunc_find_median_value((uint16_t *)g_aublc_bm_buf, MAX_AUBLC_BUF_SIZE, 16); r_vhl = g_aublc_gm_buf[0] - g_aublc_rm_buf[0]; b_vhl = g_aublc_gm_buf[0] - g_aublc_bm_buf[0]; f_val = abs(r_vhl); if (r_vhl > 0) { pAublc->r_offset = 0x40 - f_val / 2.5; } else { pAublc->r_offset = 0x40 + f_val / 2.5; } f_val = abs(b_vhl); if (b_vhl > 0) { pAublc->b_offset = 0x40 - f_val / 2.5; } else { pAublc->b_offset = 0x40 + f_val / 2.5; }} Makefile文件： export ARCH=arm64export CROSS_COMPILE=aarch64-himix200-linux-PWD := $(shell pwd)KERNDIR := /home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/osdrv/opensource/kernel/linux-4.19.yCONFIG_CV8988 := m#ccflags-y += -mfloat-softfp -mfpu=neonifneq ($(KERNELRELEASE),)cv8988-objs += cv8988.ocv8988-objs += mtx_drv_aublc.ocv8988-objs += mtx_drv_comm.ocv8988-objs += mtx_drv_cra.ocv8988-objs += mtx_drv_mdt.ocv8988-objs += mtx_drv_modules.ocv8988-objs += mtx_lib_api.ocv8988-objs += TX_VESA_TIMING_TBL.oobj-$(CONFIG_CV8988) += cv8988.oelseall: $(Q)$(MAKE) $(S) -C $(KERNDIR) M=$(PWD) modulesclean: $(Q)$(MAKE) $(S) -C $(KERNDIR) M=$(PWD) cleanendif.PHONY: all clean 编译报错： make -C /home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/osdrv/opensource/kernel/linux-4.19.y M=/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013 modulesmake[1]: 进入目录“/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/osdrv/opensource/kernel/linux-4.19.y”make[2]: 放弃循环依赖 /home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/cv8988.o <- /home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/cv8988.o 。 CC [M] /home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.o/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c: In function 'txdrv_aublc_factory_set':/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c:141:24: error: '-mgeneral-regs-only' is incompatible with floating-point code pAublc->r_gain = 0x80 - f_val/1.600 ; ~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c:141:24: error: '-mgeneral-regs-only' is incompatible with floating-point argument/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c:141:24: error: '-mgeneral-regs-only' is incompatible with floating-point argument/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c:141:24: error: '-mgeneral-regs-only' is incompatible with floating-point code/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.c:141:24: internal compiler error: Segmentation faultPlease submit a full bug report,with preprocessed source if appropriate.See for instructions.make[2]: *** [scripts/Makefile.build:304：/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013/mtx_drv_aublc.o] 错误 1make[1]: *** [Makefile:1524：_module_/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/drv/extdrv/cv8988/cv8988_vga_decoder_sdk_v1.0_20211013] 错误 2make[1]: 离开目录“/home/linux/nvr/Hi3531DV200_SDK_V2.0.0.3/osdrv/opensource/kernel/linux-4.19.y”make: *** [Makefile:22：all] 错误 2 我尝试添加以下编译选项，去解决问题，又提示我没有识别到这两个编译选项ccflags-y += -mfloat-softfp -mfpu=neon 请问是否是编译器的问题，如何解决呢？

HDMI芯片：sii9293如何把HDMI上的音频流输入到海思里面，应用层应该是怎样的逻辑呢？

跑海思的vdec demo程序1、2、4路能正常运行，8、16路运行之后马上系统就会崩溃（有时马上会崩溃，有时不崩溃），内核和logmpp看不到任何出错信息，网口灯还在闪，telent进不去，串口没有输出。(我是通过写的编解码器程序烤机时出现的问题，才做的这方面的验证，程序主要是一编一解然后rtp发送和接受) ddr通过memtests和mtest工具测试过，没有报错。把SVB低功耗管理硬件模块断电，情况也差不多不知道是否和EMMC有关系（没有用海思推荐的emmc，但是已经读出来了）？下面是一些测试信息（8路解码，时间每次三分钟，十次） DEV1cnt 1 2 3 4 5 6 7 8 9 10state √ √ √ × × × × √ × √ CORE_SVB_PWM_CTRL 0x11029000 0x008319F1（读出来的） ‭1000 0011 0001 1001 1111 0001‬（132 CORE_SVB_PWM 输出的高电平周期数）CPU_SVB_PWM_CTRL 0x11029004 0x002F19F1（读出来的） ‭0010 1111 0001 1001 1111 0001‬（47 CPU_SVB_PWM 输出的高电平周期数） DEV2（8路解码）cnt 1 2 3 4 5 6 7 8 9 10state： √ √ √ √ × √ √ √ √ ×（1路解码）state： √ √ √ √ √ √ √ √ √ √ CORE_SVB_PWM_CTRL 0x11029000 0x007319F1（读出来的） 0111 0011 0001 1001 1111 0001‬（115 CORE_SVB_PWM 输出的高电平周期数）CPU_SVB_PWM_CTRL 0x11029004 0x002819F1（读出来的） ‭0010 1000 0001 1001 1111 0001‬（40 CPU_SVB_PWM 输出的高电平周期数） DEV3cnt 1 2 3 4 5 6 7 8 9 10state： √ √ √ × × × × × √ × CORE_SVB_PWM_CTRL 0x11029000 0（自己配置的，目的禁用SVB）CPU_SVB_PWM_CTRL 0x11029004 0（自己配置的，目的禁用SVB）

业务流程：SDI——>GS3471—->BT.1120—->VI视频转换芯片：GS3471主芯片：Hi3531dv200 因为我们YC是反接得，所以再VI配置得时候把mask也反着配得。只显示黑白色没有问题。其他颜色显示不正常。整体偏红 附件是采集到得图片，vi信息，以及接线方式。 祝好！

通过hdmi输入1080p视频，然后vpss裁剪为PAL制式视频，直接通过cvbs输出。目前可以在vo抓到图片，但是输出到屏幕上的时候就只能看到背景色。