// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1126.dtsi"
#include "rv1126-ipc.dtsi"
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/input/input.h>
/ {
model = "Rockchip RV1126 38x38 V10 EMMC DDR3 Board";
compatible = "rockchip,rv1126-38x38-v10-emmc", "rockchip,rv1126";
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
};
/delete-node/ vdd-npu;
/delete-node/ vdd-vepu;
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_dvdd: vcc-dvdd {
compatible = "regulator-fixed";
regulator-name = "vcc_dvdd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
};
vcc3v3_sys: vcc33sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc_sd: vcc-sd {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&sdmmc_pwr>;
pinctrl-names = "default";
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
vin-supply = <&vcc3v3_sys>;
enable-active-high;
};
vdd_arm: vdd-arm {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
regulator-name = "vdd_arm";
regulator-min-microvolt = <720000>;
regulator-max-microvolt = <1000000>;
regulator-init-microvolt = <825000>;
regulator-always-on;
regulator-boot-on;
regulator-settling-time-up-us = <250>;
pwm-supply = <&vcc3v3_sys>;
status = "okay";
};
/*
* pwm1 is reserved as voltage adjustment in hardware
* use fixed regulator to avoid voltage adjustment by software
*/
vdd_logic_npu_vepu: vdd-logic-npu-vepu {
compatible = "pwm-regulator";
pwms = <&pwm1 0 5000 1>;
regulator-name = "vdd_logic_npu_vepu";
regulator-min-microvolt = <720000>;
regulator-max-microvolt = <880000>;
regulator-init-microvolt = <825000>;
regulator-always-on;
regulator-boot-on;
regulator-settling-time-up-us = <250>;
pwm-supply = <&vcc3v3_sys>;
status = "okay";
};
vdd_logic_npu_vepu_fixed: vdd-logic-npu-vepu-fixed {
compatible = "regulator-fixed";
regulator-name = "vdd_logic_npu_vepu-fixed";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <825000>;
regulator-max-microvolt = <825000>;
};
vdd_npu: vdd-npu {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
regulator-name = "vdd_npu";
regulator-min-microvolt = <650000>;
regulator-max-microvolt = <950000>;
regulator-init-microvolt = <800000>;
regulator-always-on;
regulator-boot-on;
regulator-settling-time-up-us = <250>;
pwm-supply = <&vcc5v0_sys>;
status = "okay";
};
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
poll-interval = <100>;
keyup-threshold-microvolt = <1800000>;
esc-key {
label = "esc";
linux,code = <KEY_ESC>;
press-threshold-microvolt = <0>;
};
};
cam_ircut0: cam_ircut {
status = "disabled";
compatible = "rockchip,ircut";
ircut-open-gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_HIGH>;
ircut-close-gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
};
flash_ir: flash-ir {
status = "okay";
compatible = "led,rgb13h";
label = "pwm-flash-ir";
led-max-microamp = <20000>;
flash-max-microamp = <20000>;
flash-max-timeout-us = <1000000>;
pwms=<&pwm3 0 25000 0>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
};
i2s0_sound: i2s0-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,i2s0-sound";
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&es8311>;
};
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
};
wireless-bluetooth {
compatible = "bluetooth-platdata";
uart_rts_gpios = <&gpio1 RK_PC0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart0_rtsn>;
pinctrl-1 = <&uart0_rtsn_gpio>;
BT,power_gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
// status = "okay";
status = "disabled";//by wilson
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
// clocks = <&rk809 1>;
// clock-names = "clk_wifi";
// pinctrl-names = "default";
pinctrl-0 = <&wifi_wake_host>;
wifi_chip_type = "ap6255";
WIFI,poweren_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
WIFI,host_wake_irq = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/*
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "USB-WiFi";
WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
*/
gpioled {
compatible = "anytrek, led";
led-gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
cam_en {
compatible = "anytrek, camera_power_enable";
cam-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&display_subsystem {
status = "okay";
};
&dsi {
status = "okay";
rockchip,lane-rate = <480>;
panel@0 {
compatible = "simple-panel-dsi";
reg = <0>;
//backlight = <&backlight>;
//power-supply = <&vcc18_lcd_n>;
prepare-delay-ms = <5>;
reset-delay-ms = <1>;
init-delay-ms = <80>;
disable-delay-ms = <10>;
unprepare-delay-ms = <5>;
width-mm = <68>;
height-mm = <121>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33359000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <210>;
hsync-len = <1>;
hback-porch = <46>;
vfront-porch = <22>;
vsync-len = <1>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&csi_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out0>;
data-lanes = <1 2>;
// data-lanes = <1 2 3 4>;//sure
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
data-lanes = <1 2>;
// data-lanes = <1 2 3 4>;
};
};
};
};
/*
&csi_dphy1 {
status = "okay";
ports {
port@0 {
csi_dphy1_input: endpoint@1 {
remote-endpoint = <&ucam_out1>;
data-lanes = <1 2>;
//data-lanes = <1 2 3 4>;
};
};
port@1 {
csi_dphy1_output: endpoint@0 {
remote-endpoint = <&isp_virt1>;
data-lanes = <1 2>;
//data-lanes = <1 2 3 4>;
};
};
};
};
*/
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
mmc-hs200-3_3v;
rockchip,default-sample-phase = <90>;
supports-emmc;
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
status = "okay";
};
&fiq_debugger {
status = "okay";
};
// &gmac {
// phy-mode = "rgmii";
// clock_in_out = "input";
// snps,reset-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
// snps,reset-active-low;
// /* Reset time is 20ms, 100ms for rtl8211f */
// snps,reset-delays-us = <0 20000 100000>;
// assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_ETHERNET_OUT>;
// assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>;
// assigned-clock-rates = <125000000>, <0>, <25000000>;
// pinctrl-names = "default";
// pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;
// tx_delay = <0x2a>;
// rx_delay = <0x1a>;
// phy-handle = <&phy>;
// status = "okay";
// };
&gmac {
phy-mode = "rmii";
clock_in_out = "output";
snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 50000 10000>;
assigned-clocks = <&cru CLK_GMAC_SRC_M1>, <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>;
assigned-clock-rates = <0>, <50000000>;
assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>, <&cru CLK_GMAC_SRC_M1>, <&cru RMII_MODE_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&rmiim1_pins &gmac_clk_m1_pins &gmac_clk_m1_drv_level0_pins>;
phy-handle = <&phy>;
status = "okay";
fixed-link {
speed = <100>;
full-duplex;
};
};
&i2c0 {
status = "okay";
pcf8563: pcf8563@51 {
compatible = "pcf8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "xin32k";
};
};
/*
&i2c1 {
status = "okay";
clock-frequency = <400000>;
imx415: imx415@1a {
compatible = "sony,imx415";
reg = <0x1a>;
clocks = <&cru CLK_MIPICSI_OUT>;
clock-names = "xvclk";
power-domains = <&power RV1126_PD_VI>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&mipicsi_clk0>;
// avdd-supply = <&vcc3v3_sys>;
// dovdd-supply = <&vcc_1v8>;
// dvdd-supply = <&vcc_dvdd>;
// reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "YT10092";
rockchip,camera-module-lens-name = "IR0147-28IRC-8M-F20";
// ir-cut = <&cam_ircut0>;
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
gc2053_2: gc2053_2@3f {
compatible = "galaxycore,gc2053";
reg = <0x3f>;
clocks = <&cru CLK_MIPICSI_OUT>;
clock-names = "xvclk";
power-domains = <&power RV1126_PD_VI>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&mipicsi_clk1>;
// pwd-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
// reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "CMK-OT1726-PG1";
rockchip,camera-module-lens-name = "29IR-2MP-F25";
// ir-cut = <&cam_ircut0>;
port {
ucam_out1: endpoint {
remote-endpoint = <&csi_dphy1_input>;
data-lanes = <1 2>;
};
};
};
};
*/
&i2c1 {
status = "okay";
clock-frequency = <400000>;
// gc2053_2: gc2053_2@3f {
// compatible = "galaxycore,gc2053";
// reg = <0x3f>;
// clocks = <&cru CLK_MIPICSI_OUT>;
// clock-names = "xvclk";
// power-domains = <&power RV1126_PD_VI>;
// pinctrl-names = "rockchip,camera_default";
// pinctrl-0 = <&mipicsi_clk1>;
// // pwd-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
// // reset-gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>;
// rockchip,camera-module-index = <1>;
// rockchip,camera-module-facing = "front";
// rockchip,camera-module-name = "CMK-OT1726-PG1";
// rockchip,camera-module-lens-name = "29IR-2MP-F25";
// // ir-cut = <&cam_ircut0>;
// port {
// ucam_out1: endpoint {
// remote-endpoint = <&csi_dphy1_input>;
// data-lanes = <1 2>;
// };
// };
// };
gc2053: gc2053@37 {
compatible = "galaxycore,gc2053";
reg = <0x37>;
clocks = <&cru CLK_MIPICSI_OUT>;
clock-names = "xvclk";
power-domains = <&power RV1126_PD_VI>;
pinctrl-names = "rockchip,camera_default";
pinctrl-0 = <&mipicsi_clk0>;
power-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "YT-RV1109-2-V1";
rockchip,camera-module-lens-name = "40IR-2MP-F20";
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2>;
};
};
};
};
&i2c5 {
status = "okay";
icn6211: icn6211@2c {
compatible = "icn6211";
reg = <0x2c>;
};
};
/* isp cma buffer don't fiddle with it, dual camera(1920 * 1080) need 92M buffer */
&isp_reserved {
//size = <0x5c00000>;
size = <0xb800000>;
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-0 = <&i2c4m1_xfer>;
es8311: es8311@18 {
compatible = "everest,es8311";
reg = <0x18>;
clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
clock-names = "mclk";
adc-volume = <0xbf>; /* 0dB */
dac-volume = <0xbf>; /* 0dB */
//aec-mode = "dac left, adc right";
aec-mode = "adc left, adc right";
pinctrl-names = "default";
pinctrl-0 = <&i2s0m0_mclk >;
//&spk_ctl>;
assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
assigned-clock-parents = <&cru MCLK_I2S0_TX>;
//spk-ctl-gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};
&i2s0_8ch {
status = "okay";
rockchip,clk-trcm = <1>;
#sound-dai-cells = <0>;
pinctrl-0 = <&i2s0m0_sclk_tx
&i2s0m0_lrck_tx
&i2s0m0_sdi0
&i2s0m0_sdo0>;
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&mdio {
phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
};
};
&mipi_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
data-lanes = <1 2>;
// data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
data-lanes = <1 2>;
// data-lanes = <1 2 3 4>;
};
};
};
};
&mipi_dphy {
status = "okay";
};
/*
&npu {
npu-supply = <&vdd_npu>;
status = "okay";
};
*/
&npu_tsadc {
status = "okay";
};
&optee {
status = "disabled";
};
&otp {
status = "okay";
};
&pinctrl {
sdmmc-pwr {
/omit-if-no-ref/
sdmmc_pwr: sdmmc-pwr {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio-pwrseq {
/omit-if-no-ref/
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
/omit-if-no-ref/
wifi_wake_host: wifi-wake-host {
rockchip,pins = <0 RK_PB0 0 &pcfg_pull_up>;
};
};
};
&pmu_io_domains {
status = "okay";
//pmuio0-supply = <&vcc_1v8>;
pmuio0-supply = <&vcc3v3_sys>;
pmuio1-supply = <&vcc3v3_sys>;
vccio2-supply = <&vcc3v3_sys>;
vccio3-supply = <&vcc_1v8>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc3v3_sys>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc3v3_sys>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m0_pins_pull_down>;
};
&rk_rga {
status = "okay";
};
&rkcif {
status = "okay";
};
&rkcif_mmu {
status = "disabled";
};
&rkcif_dvp {
status = "okay";
port {
/* Parallel bus endpoint */
/*
cif_para_in: endpoint {
remote-endpoint = <&cam_para_out1>;
bus-width = <12>;
hsync-active = <1>;
vsync-active = <0>;
};
*/
};
};
&rkcif_mipi_lvds {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
//data-lanes = <1 2>;
data-lanes = <1 2 3 4>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_in>;
//data-lanes = <1 2>;
data-lanes = <1 2 3 4>;
};
};
};
&rkisp_vir0 {
status = "okay";
ports {
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
isp_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
};
/*
&rkisp_vir1 {
status = "okay";
ports {
port@0 {
isp_virt1: endpoint@0 {
remote-endpoint = <&csi_dphy1_output>;
};
};
};
};
*/
&rkispp_vir1 {
status = "okay";
};
&rkispp {
status = "okay";
/* the max input w h and fps of mulit sensor */
//max-input = <1920 1080 30>;
max-input = <3840 2160 30>;
};
&rkvenc {
venc-supply = <&vdd_logic_npu_vepu_fixed>;
};
&rockchip_suspend {
status = "okay";
rockchip,sleep-debug-en = <1>;
rockchip,sleep-mode-config = <
(0
| RKPM_SLP_ARMOFF
| RKPM_SLP_PMU_PMUALIVE_32K
| RKPM_SLP_PMU_DIS_OSC
)
>;
};
&route_dsi {
status = "okay";
};
&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};
&sdmmc0_bus4 {
rockchip,pins =
/* sdmmc0_d0 */
<1 RK_PA4 1 &pcfg_pull_up_drv_level_0>,
/* sdmmc0_d1 */
<1 RK_PA5 1 &pcfg_pull_up_drv_level_0>,
/* sdmmc0_d2 */
<1 RK_PA6 1 &pcfg_pull_up_drv_level_0>,
/* sdmmc0_d3 */
<1 RK_PA7 1 &pcfg_pull_up_drv_level_0>;
};
&sdmmc0_clk {
rockchip,pins =
/* sdmmc0_clk */
<1 RK_PB0 1 &pcfg_pull_up_drv_level_3>;
};
&sdmmc0_cmd {
rockchip,pins =
/* sdmmc0_cmd */
<1 RK_PB1 1 &pcfg_pull_up_drv_level_0>;
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
rockchip,default-sample-phase = <90>;
supports-sd;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
status = "okay";
vmmc-supply = <&vcc_sd>;
};
&soc_crit {
/* millicelsius */
temperature = <125000>;
};
&sdio {
max-frequency = <20000000>;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
//non-removable;
rockchip,default-sample-phase = <135>;//<90>;
//sd-uhs-sdr104;
supports-sdio;
//mmc-pwrseq = <&sdio_pwrseq>;
status = "okay";
};
&sfc {
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
status = "okay";
};
&u2phy0 {
status = "okay";
vup-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
u2phy_otg: otg-port {
status = "okay";
};
};
&i2c3 {
status = "okay";
};
&u2phy1 {
status = "okay";
u2phy_host: host-port {
status = "okay";
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_ctsn>;
status = "okay";
};
&uart4 {
pinctrl-0 = <&uart4m1_xfer>;
status = "okay";
};
&uart5 {
pinctrl-0 = <&uart5m1_xfer>;
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usbdrd {
status = "okay";
};
&usbdrd_dwc3 {
status = "okay";
extcon = <&u2phy0>;
};
&vdpu {
status = "okay";
};
&vop {
status = "okay";
};
&vop_mmu {
status = "okay";
};