2988
- 收藏
- 点赞
- 分享
- 举报
3516ev100+imx291,调试vi。
在淘宝上看到友商有个模组是3516ev100+imx291的,正好看到驱动包里面有imx290的驱动,觉得应该差不多,就入手了一个,然后就开始了悲催的调试。
首先看看vi,只见IntfM项赫然显示LVDS,我就觉得惨了,搞了个非常规设计的硬件。
然后看看mipi,
Devno WorkMode RawDataType LinkIdx LaneCount LaneId PhyData
0 LVDS RAW12 0 4 0, 1, 2, 3 0xa103a10
感觉和之前的一款3516d+imx291的有点类似,就硬着头皮去找以前的资料。
1、现在是load脚本按照以下初始化:别问我为什么是ar0237,我是抄的。
ar0237|ar0330)
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=27000000;
intf_mode="default";
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
2、sensor驱动是移植了以前imx291的:应该是ok的,写寄存器的时候没有提示异常,我猜应该是写进去了。
Sony imx291 sensor 1080P30fps(LVDS port) init success!
3、vi的参数是从16d里面抄了imx178的参数,抄过来之后发现结构体不一样,随便改一下试试吧。我可以肯定这个参数里面一定有错误。
combo_dev_attr_t LVDS_4lane_SENSOR_IMX178_12BIT_1080p_ATTR =
{
/* input mode */
.input_mode = INPUT_MODE_LVDS,
{
.lvds_attr = {
.img_size = {1920, 1080},
.raw_data_type = RAW_DATA_12BIT,
.wdr_mode = HI_WDR_MODE_NONE,
.sync_mode = LVDS_SYNC_MODE_SAV,
.vsync_type = {LVDS_VSYNC_NORMAL, 0, 0},
.fid_type = {LVDS_FID_IN_SAV, HI_FALSE},
.data_endian = LVDS_ENDIAN_BIG,
.sync_code_endian = LVDS_ENDIAN_BIG,
.lane_id = {0, 1, 2, 3},
.sync_code = {
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
}
}
}
};
4、sample用的是16ev100的sample,增加了一个新的291的sensor宏。
跑起来理所当然的vi没中断。。。日志如下:我觉得问题最大的应该是mipi的PhyData,这个值会根据combo_dev_attr_t的值改变,我对这个参数最没信心。
/proc/umap# cat vi
[VIU] Version: [Hi3516CV300_MPP_V1.0.3.0 B020 Release], Build Time: [Nov 26 2017, 12:44:21]
-----MODULE PARAM---------------------------------------------------------------
detect_err_frame drop_err_frame stop_int_level yuv_skip delay_line
10 0 0 0 16
-----VI-VPSS ONLINE STATE-------------------------------------------------------
OnlineState
online
-----VI MODULE STATE------------------------------------------------------------
ModuleState
Started
-----VI PORT SIZE---------------------------------------------------------------
Dev WIDTH HEIGHT
0 0 0
-----VI DEV ATTR1---------------------------------------------------------------
Dev IntfM WkM ComMsk0 ComMsk1 ScanM AD0 AD1 AD2
0 LVDS 1Mux fff00000 0 P -1 -1 -1
-----VI DEV ATTR2---------------------------------------------------------------
AD3 Seq DPath DType DRev CapX CapY CapW CapH BasW BasH Comp HReph VReph
-1 N/A ISP RGB N 0 20 1920 1080 0 0 N NONE NONE
-----VI HIGH DEV ATTR 1---------------------------------------------------------
Dev InputM WkM ComMsk0 ComMsk1 ScanM AD0 AD1 AD2
-----VI HIGH DEV ATTR 2---------------------------------------------------------
AD3 Seq CombM CompM ClkM Fix FldP DPath DType DRev
-----VI HIGH DEV ATTR 3---------------------------------------------------------
CapX CapY CapW CapH BasW BasH Comp HReph VReph
-----VI PHYCHN ATTR 1-----------------------------------------------------------
PhyChn CapX CapY CapW CapH DstW DstH CapSel Mirror Flip
0 0 0 1920 1080 1920 1080 both N N
-----VI PHYCHN ATTR 2-----------------------------------------------------------
IntEn PixFom SrcRat DstRat Comp
Y SP420 -1 -1 N
-----VI PHYCHN STATUS 1---------------------------------------------------------
PhyChn Dev IntCnt VbFail LosInt TopLos BotLos BufCnt IntT
0 0 0 0 0 0 0 0 0
-----VI PHYCHN STATUS 2---------------------------------------------------------
SendT Field Stride MaxIntT IntGapT MaxGapT LIntCnt ThrCnt AutoDis
0 frm 1920 0 0 0 0 0 0
-----VI PHYCHN STATUS 3---------------------------------------------------------
CasAutD TmgErr ccErrN IntRat
0 0 0 0
-----VI LDC ATTR----------------------------------------------------------------
PhyChn ViewType Ratio minRatio COffX COffY Enable
-----VI FLASH ATTR--------------------------------------------------------------
Dev Mode StartTime DuraTime InterVal CapIdx Enable FlashedNum
0 Once 0 0 0 0 N 0
-----VI CSC ATTR----------------------------------------------------------------
Dev Type HueVal ContrVal LumaVal StatuVal TVMode
0 709 50 50 50 50 N
-----VI DCI ATTR----------------------------------------------------------------
Dev Enable BlackGain ContrGain LightGain ManBlendEn BlendRatio BlackStretchEn
0 Y 32 32 32 NA NA NA
-----VI VC NUMBER---------------------------------------------------------------
Dev Linear DES0 DES1 DES2
0 NA NA NA NA
-----VI WDR ATTR----------------------------------------------------------------
Dev Mode BufNum DstW DstH PoolId VcNum DesNum State Comp
0 NONE 0 1920 1080 -1 0 0 Init N
-----VI WDR DES STATUS----------------------------------------------------------
Dev Idx IntGap IntCnt CcErrCnt
-----VI WDR SRC STATUS----------------------------------------------------------
Dev Idx IntGap IntCnt CcErrCnt
-----VI WDR COMBINE STATUS------------------------------------------------------
Dev IntGap IntCnt CcErrCnt
0 0 0 0
/proc/umap# cat hi_mipi
Module: [MIPI], Build Time: [Nov 26 2017, 12:45:41]
-----Combo DEV ATTR-----------------------------------------------------------------
Devno WorkMode RawDataType LinkIdx LaneCount LaneId PhyData
0 LVDS RAW12 0 4 0, 1, 2, 3 0xee0000ff
-----Mipi Crop Info-----------------------------------------------------------------
Devno bEnCrop ImgX ImgY ImgW ImgH
0 0 0 0 0 0
-----lvds detect info----------------------------------------------------
Devno WDR_Frame width height
0 LEF 0 0
0 SEF1 0 0
0 SEF2 0 0
0 SEF3 0 0
-----fsm timeout and escape info---------------------------------------------
link clkTOutCnt d0TOutCnt d1TOutCnt d2TOutCnt d3TOutCnt clkEscCnt d0EscCnt d1EscCnt d2EscCnt d3EscCnt
0 0 0 0 0 0 0 0 0 0 0
-----LVDS/SUBLVDS/HISPI phy and lane state info--------------------------------------
Devno StatErr Link0WErr Link0RErr Link0HSynErr Link0VSynErr
0 0 0 0 0 0
Devno Lane0Err Lane1Err Lane2Err Lane3Err
0 0 0 0 0
-----ALING Err info--------------------------------------
Devno FIFO_FullErr Lane0Err Lane1Err Lane2Err Lane3Err
0 0 0 0 0 0
/proc/umap#
首先看看vi,只见IntfM项赫然显示LVDS,我就觉得惨了,搞了个非常规设计的硬件。
然后看看mipi,
Devno WorkMode RawDataType LinkIdx LaneCount LaneId PhyData
0 LVDS RAW12 0 4 0, 1, 2, 3 0xa103a10
感觉和之前的一款3516d+imx291的有点类似,就硬着头皮去找以前的资料。
1、现在是load脚本按照以下初始化:别问我为什么是ar0237,我是抄的。
ar0237|ar0330)
bus_type="i2c";
pinmux_mode="i2c_dc";
sensor_clk_freq=27000000;
intf_mode="default";
viu_frequency=83300000; # 83.3M, viu clock frequency
isp_div=1; # isp div clk, freq = viu_clk_freq / div
2、sensor驱动是移植了以前imx291的:应该是ok的,写寄存器的时候没有提示异常,我猜应该是写进去了。
Sony imx291 sensor 1080P30fps(LVDS port) init success!
3、vi的参数是从16d里面抄了imx178的参数,抄过来之后发现结构体不一样,随便改一下试试吧。我可以肯定这个参数里面一定有错误。
combo_dev_attr_t LVDS_4lane_SENSOR_IMX178_12BIT_1080p_ATTR =
{
/* input mode */
.input_mode = INPUT_MODE_LVDS,
{
.lvds_attr = {
.img_size = {1920, 1080},
.raw_data_type = RAW_DATA_12BIT,
.wdr_mode = HI_WDR_MODE_NONE,
.sync_mode = LVDS_SYNC_MODE_SAV,
.vsync_type = {LVDS_VSYNC_NORMAL, 0, 0},
.fid_type = {LVDS_FID_IN_SAV, HI_FALSE},
.data_endian = LVDS_ENDIAN_BIG,
.sync_code_endian = LVDS_ENDIAN_BIG,
.lane_id = {0, 1, 2, 3},
.sync_code = {
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
{ {0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0},
{0xab0, 0xb60, 0x800, 0x9d0}
},
}
}
}
};
4、sample用的是16ev100的sample,增加了一个新的291的sensor宏。
跑起来理所当然的vi没中断。。。日志如下:我觉得问题最大的应该是mipi的PhyData,这个值会根据combo_dev_attr_t的值改变,我对这个参数最没信心。
/proc/umap# cat vi
[VIU] Version: [Hi3516CV300_MPP_V1.0.3.0 B020 Release], Build Time: [Nov 26 2017, 12:44:21]
-----MODULE PARAM---------------------------------------------------------------
detect_err_frame drop_err_frame stop_int_level yuv_skip delay_line
10 0 0 0 16
-----VI-VPSS ONLINE STATE-------------------------------------------------------
OnlineState
online
-----VI MODULE STATE------------------------------------------------------------
ModuleState
Started
-----VI PORT SIZE---------------------------------------------------------------
Dev WIDTH HEIGHT
0 0 0
-----VI DEV ATTR1---------------------------------------------------------------
Dev IntfM WkM ComMsk0 ComMsk1 ScanM AD0 AD1 AD2
0 LVDS 1Mux fff00000 0 P -1 -1 -1
-----VI DEV ATTR2---------------------------------------------------------------
AD3 Seq DPath DType DRev CapX CapY CapW CapH BasW BasH Comp HReph VReph
-1 N/A ISP RGB N 0 20 1920 1080 0 0 N NONE NONE
-----VI HIGH DEV ATTR 1---------------------------------------------------------
Dev InputM WkM ComMsk0 ComMsk1 ScanM AD0 AD1 AD2
-----VI HIGH DEV ATTR 2---------------------------------------------------------
AD3 Seq CombM CompM ClkM Fix FldP DPath DType DRev
-----VI HIGH DEV ATTR 3---------------------------------------------------------
CapX CapY CapW CapH BasW BasH Comp HReph VReph
-----VI PHYCHN ATTR 1-----------------------------------------------------------
PhyChn CapX CapY CapW CapH DstW DstH CapSel Mirror Flip
0 0 0 1920 1080 1920 1080 both N N
-----VI PHYCHN ATTR 2-----------------------------------------------------------
IntEn PixFom SrcRat DstRat Comp
Y SP420 -1 -1 N
-----VI PHYCHN STATUS 1---------------------------------------------------------
PhyChn Dev IntCnt VbFail LosInt TopLos BotLos BufCnt IntT
0 0 0 0 0 0 0 0 0
-----VI PHYCHN STATUS 2---------------------------------------------------------
SendT Field Stride MaxIntT IntGapT MaxGapT LIntCnt ThrCnt AutoDis
0 frm 1920 0 0 0 0 0 0
-----VI PHYCHN STATUS 3---------------------------------------------------------
CasAutD TmgErr ccErrN IntRat
0 0 0 0
-----VI LDC ATTR----------------------------------------------------------------
PhyChn ViewType Ratio minRatio COffX COffY Enable
-----VI FLASH ATTR--------------------------------------------------------------
Dev Mode StartTime DuraTime InterVal CapIdx Enable FlashedNum
0 Once 0 0 0 0 N 0
-----VI CSC ATTR----------------------------------------------------------------
Dev Type HueVal ContrVal LumaVal StatuVal TVMode
0 709 50 50 50 50 N
-----VI DCI ATTR----------------------------------------------------------------
Dev Enable BlackGain ContrGain LightGain ManBlendEn BlendRatio BlackStretchEn
0 Y 32 32 32 NA NA NA
-----VI VC NUMBER---------------------------------------------------------------
Dev Linear DES0 DES1 DES2
0 NA NA NA NA
-----VI WDR ATTR----------------------------------------------------------------
Dev Mode BufNum DstW DstH PoolId VcNum DesNum State Comp
0 NONE 0 1920 1080 -1 0 0 Init N
-----VI WDR DES STATUS----------------------------------------------------------
Dev Idx IntGap IntCnt CcErrCnt
-----VI WDR SRC STATUS----------------------------------------------------------
Dev Idx IntGap IntCnt CcErrCnt
-----VI WDR COMBINE STATUS------------------------------------------------------
Dev IntGap IntCnt CcErrCnt
0 0 0 0
/proc/umap# cat hi_mipi
Module: [MIPI], Build Time: [Nov 26 2017, 12:45:41]
-----Combo DEV ATTR-----------------------------------------------------------------
Devno WorkMode RawDataType LinkIdx LaneCount LaneId PhyData
0 LVDS RAW12 0 4 0, 1, 2, 3 0xee0000ff
-----Mipi Crop Info-----------------------------------------------------------------
Devno bEnCrop ImgX ImgY ImgW ImgH
0 0 0 0 0 0
-----lvds detect info----------------------------------------------------
Devno WDR_Frame width height
0 LEF 0 0
0 SEF1 0 0
0 SEF2 0 0
0 SEF3 0 0
-----fsm timeout and escape info---------------------------------------------
link clkTOutCnt d0TOutCnt d1TOutCnt d2TOutCnt d3TOutCnt clkEscCnt d0EscCnt d1EscCnt d2EscCnt d3EscCnt
0 0 0 0 0 0 0 0 0 0 0
-----LVDS/SUBLVDS/HISPI phy and lane state info--------------------------------------
Devno StatErr Link0WErr Link0RErr Link0HSynErr Link0VSynErr
0 0 0 0 0 0
Devno Lane0Err Lane1Err Lane2Err Lane3Err
0 0 0 0 0
-----ALING Err info--------------------------------------
Devno FIFO_FullErr Lane0Err Lane1Err Lane2Err Lane3Err
0 0 0 0 0 0
/proc/umap#
我来回答
回答12个
时间排序
认可量排序
认可0
认可0
认可0
认可0
认可0
认可0
认可0
认可0
认可0
认可0
认可0
认可0
或将文件直接拖到这里
悬赏:
E币
网盘
* 网盘链接:
* 提取码:
悬赏:
E币
Markdown 语法
- 加粗**内容**
- 斜体*内容*
- 删除线~~内容~~
- 引用> 引用内容
- 代码`代码`
- 代码块```编程语言↵代码```
- 链接[链接标题](url)
- 无序列表- 内容
- 有序列表1. 内容
- 缩进内容
- 图片![alt](url)
相关问答
-
2017-12-15 13:56:32
-
2019-05-09 19:14:25
-
2019-07-25 19:03:14
-
2016-11-24 11:28:46
-
2017-06-02 14:00:19
-
2019-06-25 09:51:20
-
2019-05-03 19:48:20
-
2019-05-13 18:44:01
-
2019-07-07 16:24:00
-
2019-06-17 12:26:51
-
2019-05-14 17:45:06
-
2018-07-04 14:14:47
-
2016-05-17 11:40:12
-
2019-11-19 14:23:03
-
2018-11-17 17:00:44
-
2018-04-12 17:40:50
-
2019-01-21 10:50:09
-
2016-09-09 10:48:32
-
2018-12-26 16:59:26
无更多相似问答 去提问
点击登录
-- 积分
-- E币
提问
—
收益
—
被采纳
—
我要提问
切换马甲
上一页
下一页
悬赏问答
-
50如何获取vpss chn的图像修改后发送至vo
-
5FPGA通过Bt1120传YUV422数据过来,vi接收不到数据——3516dv500
-
50SS928 运行PQtools 拼接 推到设备里有一半画面会异常
-
53536AV100的sample_vdec输出到CVBS显示
-
10海思板子mpp怎么在vi阶段改变视频数据尺寸
-
10HI3559AV100 多摄像头同步模式
-
9海思ss928单路摄像头vio中加入opencv处理并显示
-
10EB-RV1126-BC-191板子运行自己编码的程序
-
10求HI3519DV500_SDK_V2.0.1.1
-
5有偿求HI3516DV500 + OV5647驱动
举报反馈
举报类型
- 内容涉黄/赌/毒
- 内容侵权/抄袭
- 政治相关
- 涉嫌广告
- 侮辱谩骂
- 其他
详细说明
提醒
你的问题还没有最佳答案,是否结题,结题后将扣除20%的悬赏金
取消
确认
提醒
你的问题还没有最佳答案,是否结题,结题后将根据回答情况扣除相应悬赏金(1回答=1E币)
取消
确认