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tqingguang6688  发布于  2017-07-22 15:31:18
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5458

HI3536 VI 不能采集问题

 
目前使用HI3536的VI采集功能,输入端AD为7842芯片,配置时序是好的,在3516A上验证过。
按16A的配置方式,配置36,一直没有中断,不知什么问题,发帖看大家有没有碰到类似问题
我来回答
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时间排序
认可量排序

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tqingguang6688 2017-07-22 15:34:54
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1、管脚复用配置
himm 0x120f0120 0x2  #muxctrl_reg72  vo_data4;
himm 0x120f0124 0x2  #muxctrl_reg73  vo_data5;
himm 0x120f0128 0x2  #muxctrl_reg74  vo_data8;
himm 0x120f012c 0x2  #muxctrl_reg75  vo_data7;
himm 0x120f0130 0x2  #muxctrl_reg76  vo_data1;
himm 0x120f0134 0x2  #muxctrl_reg77  vo_data3;
himm 0x120f0138 0x2  #muxctrl_reg78  vo_data2;
himm 0x120f013c 0x2  #muxctrl_reg79  vo_data9;
himm 0x120f0140 0x2  #muxctrl_reg80  vo_clk;
himm 0x120f0144 0x2  #muxctrl_reg81  vo_data0;
himm 0x120f0148 0x2  #muxctrl_reg82  vo_data14;
himm 0x120f014c 0x2  #muxctrl_reg83  vo_data11;
himm 0x120f0150 0x2  #muxctrl_reg84  vo_data6;
himm 0x120f0154 0x2  #muxctrl_reg85  vo_data13;
himm 0x120f0158 0x2  #muxctrl_reg86  vo_data15;
himm 0x120f015c 0x2  #muxctrl_reg87  vo_data12;
himm 0x120f0160 0x2  #muxctrl_reg88  vo_data10;

2、配置代码片段
s32Ret = SAMPLE_COMM_SYS_Init(&stVbConf);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("system init failed with %d!\n", s32Ret);
        goto END_HDZOOMIN_0;
    }

    /******************************************
     step 3: start vi dev & chn
    ******************************************/
    s32Ret = SAMPLE_COMM_VI_Start(enViMode, enNorm);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("start vi failed!\n");
        goto END_HDZOOMIN_0;
    }

    /******************************************
     step 4: start vpss and vi bind vpss
    ******************************************/
    s32Ret = SAMPLE_COMM_SYS_GetPicSize(enNorm, PIC_HD720, &stSize);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("SAMPLE_COMM_SYS_GetPicSize failed!\n");
        goto END_HDZOOMIN_0;
    }

        memset(&stGrpAttr,0,sizeof(VPSS_GRP_ATTR_S));
        stGrpAttr.u32MaxW = stSize.u32Width;
        stGrpAttr.u32MaxH = stSize.u32Height;
        stGrpAttr.enPixFmt = SAMPLE_PIXEL_FORMAT;
        stGrpAttr.bIeEn = HI_FALSE;
        stGrpAttr.bNrEn = HI_TRUE;
        stGrpAttr.bDciEn = HI_FALSE;
        stGrpAttr.bHistEn = HI_FALSE;
        stGrpAttr.bEsEn = HI_FALSE;
        stGrpAttr.enDieMode = VPSS_DIE_MODE_NODIE;
    s32Ret = SAMPLE_COMM_VPSS_Start(s32VpssGrpCnt, &stSize, u32ViChnCnt ,&stGrpAttr);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("Start Vpss failed!\n");
        goto END_HDZOOMIN_1;
    }
    //VI_CHN ViChn, VPSS_GRP VpssGrp, VPSS_CHN VpssChn
    s32Ret = SAMPLE_COMM_VI_BindVpss(0,0,0);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("Vi bind Vpss failed!\n");
        goto END_HDZOOMIN_2;
    }

    /******************************************
     step 5: start VO to preview
    ******************************************/
        printf("start vo HD0.\n");
        VoDev = SAMPLE_VO_DEV_DHD0;
        VoLayer = SAMPLE_VO_LAYER_VHD0;
        u32WndNum = 1;
        enVoMode = VO_MODE_1MUX;
       
        stVoPubAttr.enIntfSync = VO_OUTPUT_720P50;
        stVoPubAttr.enIntfType = VO_INTF_HDMI|VO_INTF_VGA;
        stVoPubAttr.u32BgColor = 0x000000ff;
        s32Ret = SAMPLE_COMM_VO_StartDev(VoDev, &stVoPubAttr);
        if (HI_SUCCESS != s32Ret)
        {
                SAMPLE_PRT("Start SAMPLE_COMM_VO_StartDev failed!\n");
                goto END_HDZOOMIN_3;
        }


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tqingguang6688 2017-07-22 15:36:17
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3、16A vi信息,,采集正常
[VIU] Version: [Hi3516A_MPP_V1.0.4.0 B040 Release], Build Time: [Jun 28 2015, 09:24:49]

VI-VPSS is offline.

-----MODULE PARAM--------------------------------------------------------------
detect_err_frame  drop_err_frame  stop_int_level
         10              0              0

-----VI DEV ATTR---------------------------------------------------------------
Dev   IntfM  WkM  ComMsk0  ComMsk1 ScanM AD0 AD1 AD2 AD3   Seq   DPath DType DRev CapX CapY  CapW  CapH
   0 BT1120S 1Mux ff000000   ff0000     P  -1  -1  -1  -1  UVUV  ByPass   YUV    N    0    0  1280   720

-----VI HIGH DEV ATTR---------------------------------------------------------------
Dev  InputM  WkM  ComMsk0  ComMsk1 ScanM AD0 AD1 AD2 AD3   Seq CombM CompM ClkM  Fix FldP   DPath DType DRev CapX CapY  CapW  CapH

-----VI PHYCHN ATTR------------------------------------------------------------
PhyChn CapX CapY  CapW  CapH  DstW  DstH CapSel Mirror Flip IntEn PixFom SrcRat DstRat   Comp
      0    0    0  1280   720  1280   720   both      N    N     Y  sp420     -1     -1      N

-----VI PHYCHN STATUS 1----------------------------------------------------------
PhyChn  Dev      IntCnt  VbFail  LosInt  TopLos  BotLos BufCnt  IntT  SendT  Field  Stride
      0    0        2266       0       2       0       2      2    76     35    frm    1280

-----VI PHYCHN STATUS 2---------------------------------------------------------
PhyChn MaxIntT   IntGapT   MaxGapT OverCnt LIntCnt  ThrCnt AutoDis CasAutD  TmgErr      ccErrN    IntRat
      0      77     16704     16705       0       0       1       0       0       0           2        60

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tqingguang6688 2017-07-22 15:37:05
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4、36采集不正常,没有中断
[VIU] Version: [Hi3536_MPP_V2.0.6.0 B030 Release], Build Time: [Jan 13 2017, 17:53:39]

-----MODULE PARAM--------------------------------------------------------------
detect_err_frame drop_err_frame stop_int_level   max_cas_gap vi_vb_source
              10              0              0        28000            0

-----VI DEV ATTR---------------------------------------------------------------
Dev   IntfM  WkM  ComMsk0  ComMsk1    CLKM AD0 AD1 AD2 AD3   Seq   DPath DType DRev   bDllSlave
   0 BT1120S 1Mux ff000000   ff0000      UP  -1  -1  -1  -1  UVUV  ByPass   YUV    N           Y

-----VI HIGH DEV ATTR---------------------------------------------------------------
Dev  InputM  WkM  ComMsk0  ComMsk1 AD0 AD1 AD2 AD3   Seq CombM CompM ClkM  Fix FldP   DPath DType DRev

-----VI PHYCHN ATTR------------------------------------------------------------
PhyChn CapX CapY  CapW  CapH  DstW  DstH CapSel ScanM     SkipM Mirror Flip IntEn PixFom SrcRat DstRat SkipMEx SkipMExYMask SkipMExCMask
      0    0    0  1280   720  1280   720   both     P   SKIPNON      N    N    Y   sp420     -1     -1       N 0x0          0xa

-----VI PHYCHN STATUS 1----------------------------------------------------------
PhyChn BindDev  Way      IntCnt  VbFail  LosInt  TopLos  BotLos BufCnt  IntT  SendT  Field  Stride
      0     0     0           0       0       0       0       0      0     0      0 (null)       0

-----VI PHYCHN STATUS 2---------------------------------------------------------
PhyChn MaxIntT IntGapT MaxGapT OverCnt LIntCnt  ThrCnt AutoDis CasAutD  TmgErr      ccErrN    IntRat
      0       0       0       0       0       0       0       0       0       0           0         0

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tqingguang6688 2017-07-22 15:37:42
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这问题困扰2天了,希望万能的网友提供支持。。。

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yu0316 2017-07-23 23:33:47
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3536有没有设置VI管脚复用
himm 0x120f009c 0x01  #VI_DATA0
himm 0x120f00a4 0x01  #VI_DATA1
himm 0x120f00a8 0x01  #VI_DATA2
himm 0x120f00ac 0x01  #VI_DATA3
himm 0x120f00b0 0x01  #VI_DATA4
himm 0x120f00b4 0x01  #VI_DATA5
himm 0x120f00b8 0x01  #VI_DATA6
himm 0x120f00bc 0x01  #VI_DATA7
himm 0x120f00c0 0x01  #VI_DATA8
himm 0x120f00c4 0x01  #VI_DATA13
himm 0x120f00c8 0x01  #VI_DATA14
himm 0x120f00cc 0x01  #VI_DATA9
himm 0x120f00d0 0x01  #VI_DATA10
himm 0x120f00d4 0x01  #VI_DATA12
himm 0x120f00d8 0x01  #VI_DATA11
himm 0x120f00dc 0x01  #VI_DATA15
himm 0x120f00a0 0x01  #VI_CLK

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tqingguang6688 2017-07-26 10:39:10
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已经设置的了,最上面的配置贴错了。
实际用的是

himm 0x120401e8 0x1  #vicap clock

himm 0x120f00a0 0x1  #muxctrl_reg40  vi_clk;
himm 0x120f009c 0x1  #muxctrl_reg39  vi_data0;
himm 0x120f00a4 0x1  #muxctrl_reg41  vi_data1;
himm 0x120f00a8 0x1  #muxctrl_reg42  vi_data2;
himm 0x120f00ac 0x1  #muxctrl_reg43  vi_data3;
himm 0x120f00b0 0x1  #muxctrl_reg44  vi_data4;
himm 0x120f00b4 0x1  #muxctrl_reg45  vi_data5;
himm 0x120f00b8 0x1  #muxctrl_reg46  vi_data6;
himm 0x120f00bc 0x1  #muxctrl_reg47  vi_data7;
himm 0x120f00c0 0x1  #muxctrl_reg48  vi_data8;
himm 0x120f00cc 0x1  #muxctrl_reg51  vi_data9;
himm 0x120f00d0 0x1  #muxctrl_reg52  vi_data10;
himm 0x120f00d8 0x1  #muxctrl_reg54  vi_data11;
himm 0x120f00d4 0x1  #muxctrl_reg53  vi_data12;
himm 0x120f00c4 0x1  #muxctrl_reg49  vi_data13;
himm 0x120f00c8 0x1  #muxctrl_reg50  vi_data14;
himm 0x120f00dc 0x1  #muxctrl_reg55  vi_data15;

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tqingguang6688 2017-07-26 10:48:31
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配置
VI_DEV_ATTR_S DEV_ATTR_7842_BT1120_1080P =
{
    /*interface mode*/
        VI_MODE_BT1120_STANDARD,
    /*work mode,1/2/4 multiplex*/
    VI_WORK_MODE_1Multiplex,
    /* r_mask    g_mask    b_mask*/
    {0xFF000000,    0xff0000},
     /*VI_CLK_EDGE_E*/
    VI_CLK_EDGE_SINGLE_UP,
    /*AdChnId*/
    {-1, -1, -1, -1},
    /*enDataSeq, just support yuv*/
    VI_INPUT_DATA_UVUV,

    /*  VI_VSYNC_FIELD   VI_VSYNC_PULSE */
    {
    /*port_vsync   port_vsync_neg     port_hsync        port_hsync_neg        */
    VI_VSYNC_PULSE, VI_VSYNC_NEG_HIGH, VI_HSYNC_VALID_SINGNAL,VI_HSYNC_NEG_HIGH,VI_VSYNC_NORM_PULSE,VI_VSYNC_VALID_NEG_HIGH,

    /*timing info*/
    /*hsync_hfb    hsync_act    hsync_hhb*/
    {0,            1920,        0,
    /*vsync0_vhb vsync0_act vsync0_hhb*/
     0,            1080,        0,
    /*vsync1_vhb vsync1_act vsync1_hhb*/
     0,            0,            0}
    }
};

参考vi:
/******************************************************************************
A simple program of Hisilicon HI3521A video input and output implementation.
Copyright (C), 2014-2015, Hisilicon Tech. Co., Ltd.
******************************************************************************
Modification:  2015-1 Created
******************************************************************************/

#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif
#endif /* End of #ifdef __cplusplus */

#include
#include
#include
#include
#include
#include
#include
#include
#include
#include

#include "sample_comm.h"

#define HDMI_SUPPORT
//#define VBI_CASCADE

/******************************************************************************
* function : show usage
******************************************************************************/
void SAMPLE_VIO_Usage(char *sPrgNm) {
        printf("Usage : %s + (eg: %s 0)\n", sPrgNm, sPrgNm);
        printf("index:\n");
        printf("\t0:  VI 1Mux 1080p input, HD ZoomIn\n");
        printf("\tq:  quit\n");

        return;
}

/******************************************************************************
* function : to process abnormal case
******************************************************************************/
void SAMPLE_VIO_HandleSig(HI_S32 signo) {
        if (SIGINT == signo || SIGTSTP == signo) {
                SAMPLE_COMM_SYS_Exit();
                printf("\033[0;31mprogram termination abnormally!\033[0;39m\n");
        }
        exit(-1);
}



HI_S32 SAMPLE_COMM_VI_Start_CascadeEX()
{

    VI_CHN ViChn = 0;
    VI_VBI_ARG_S stVbiArg;

    stVbiArg.stVbiAttr[0].enLocal = VI_VBI_LOCAL_ODD_END;
    stVbiArg.stVbiAttr[0].s32X = 0x114;
    stVbiArg.stVbiAttr[0].s32Y = 0x28;
    stVbiArg.stVbiAttr[0].u32Len = 0x20;

    stVbiArg.stVbiAttr[1].enLocal = VI_VBI_LOCAL_ODD_END;
    stVbiArg.stVbiAttr[1].s32X = 0x114;
    stVbiArg.stVbiAttr[1].s32Y = 0x28;
    stVbiArg.stVbiAttr[1].u32Len = 0x20;

    CHECK_RET(HI_MPI_VI_SetVbiAttr(ViChn, &stVbiArg),"HI_MPI_VI_SetVbiAttr");

    CHECK_RET(HI_MPI_VI_EnableVbi(ViChn),"HI_MPI_VI_EnableVbi");
    {
        CHECK_RET(HI_MPI_VI_EnableCascadeChn(VI_CAS_CHN_1),"HI_MPI_VI_EnableCascadeChn");
    }
    return HI_SUCCESS;
}


HI_S32 SAMPLE_COMM_VI_Stop_CascadeEX(VI_CHN ViChn)
{
    HI_S32 s32Ret;

    s32Ret = HI_MPI_VI_DisableCascadeChn(VI_CAS_CHN_1);
    if(s32Ret != HI_SUCCESS)
    {
        return s32Ret;
    }
    s32Ret = HI_MPI_VI_DisableVbi(ViChn);

    if(s32Ret != HI_SUCCESS)
    {
        return s32Ret;
    }
    return HI_SUCCESS;
}


/******************************************************************************
* function : cascade process
*            vo is hd : vi chn -> vo*
******************************************************************************/
HI_S32 SAMPLE_ViCap_SingleProcess() //enVoMode = VO_MODE_1MUX; SAMPLE_ViCap_SingleProcess
{ // PIC_D1, gs_s32VdecCnt, SAMPLE_VO_DEV_DHD0

        SAMPLE_VI_MODE_E enViMode = SAMPLE_VI_MODE_4_1080P;
        VIDEO_NORM_E enNorm = VIDEO_ENCODING_MODE_AUTO;
        SAMPLE_VO_MODE_E enVoMode = VO_MODE_1MUX;

        PIC_SIZE_E enVdecPicSize = PIC_HD1080;
        VO_DEV VoDev = SAMPLE_VO_DEV_DHD0;

    VDEC_CHN VdChn;
    HI_S32 s32Ret = HI_FAILURE;
    SIZE_S stSize;
    VB_CONF_S stVbConf,stModVbConf;
    HI_S32 i;
    VPSS_GRP VpssGrp;

    VI_DEV ViDev;
    VI_CHN ViChn;
    SIZE_S stDestSize;
    RECT_S stCapRect;

    VO_CHN VoChn;
    VO_PUB_ATTR_S stVoPubAttr;
    VO_ZOOM_ATTR_S stZoomAttr;
    VO_CHN_ATTR_S stChnAttr;
    HI_U32 u32WndNum, u32BlkSize, u32GrpNum;
    VO_VIDEO_LAYER_ATTR_S stLayerAttr;
    VdecThreadParam stVdecSend[VDEC_MAX_CHN_NUM];
    VDEC_CHN_ATTR_S stVdecChnAttr[VDEC_MAX_CHN_NUM];
    VPSS_CROP_INFO_S stCropInfo;

    /******************************************
     step 1: 初始化变量
    ******************************************/
    switch (enVoMode)
    {
        case VO_MODE_1MUX:
            u32WndNum = 1;
            break;
        case VO_MODE_4MUX:
            u32WndNum = 4;
            break;
        case VO_MODE_9MUX:
            u32WndNum = 9;
            break;
        case VO_MODE_16MUX:
            u32WndNum = 16;
            break;
        default:
            SAMPLE_PRT("failed with %#x!\n", s32Ret);
            return HI_FAILURE;
    }

    u32GrpNum = u32WndNum;

    s32Ret = SAMPLE_COMM_SYS_GetPicSize(enNorm, enVdecPicSize, &stSize);
    if (HI_SUCCESS !=s32Ret)
    {
        SAMPLE_PRT("get picture size failed!\n");
        return HI_FAILURE;
    }

    /******************************************
     step 2: 系统初始化
    ******************************************/
    memset(&stVbConf,0,sizeof(VB_CONF_S));
    stVbConf.u32MaxPoolCnt = VB_MAX_POOLS;

    u32BlkSize = SAMPLE_COMM_SYS_CalcPicVbBlkSize(enNorm,\
                PIC_HD1080, SAMPLE_PIXEL_FORMAT, SAMPLE_SYS_ALIGN_WIDTH);

    /*ddr0 video buffer*/
    stVbConf.astCommPool[0].u32BlkSize = u32BlkSize;
    stVbConf.astCommPool[0].u32BlkCnt = 20;


    u32BlkSize = SAMPLE_COMM_SYS_CalcPicVbBlkSize(enNorm,\
                   PIC_D1, SAMPLE_PIXEL_FORMAT, SAMPLE_SYS_ALIGN_WIDTH);
    /*ddr1 video buffer*/
    stVbConf.astCommPool[1].u32BlkSize = u32BlkSize;
    stVbConf.astCommPool[1].u32BlkCnt = 20;

    s32Ret = SAMPLE_COMM_SYS_Init(&stVbConf);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("mpp init failed!\n");
        return HI_FAILURE;
    }


    /******************************************
     step 3: start vpss for vi  one chn.
    ******************************************/
    s32Ret = SAMPLE_COMM_VPSS_Start(u32GrpNum, &stSize, VPSS_MAX_CHN_NUM/4,NULL);
    if (HI_SUCCESS !=s32Ret)
    {
        SAMPLE_PRT("vpss start failed!\n");
        goto END_0;
    }

     /******************************************
     step 4: start vo for vpss
    ******************************************/
    stVoPubAttr.enIntfSync = VO_OUTPUT_1080P30;
    stVoPubAttr.enIntfType = VO_INTF_HDMI|VO_INTF_VGA;
    stVoPubAttr.u32BgColor = 0x000000ff;

    s32Ret = SAMPLE_COMM_VO_StartDev(VoDev, &stVoPubAttr);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("Start SAMPLE_COMM_VO_StartDevLayer failed!\n");
        goto END_1;
    }

    stLayerAttr.enPixFormat = SAMPLE_PIXEL_FORMAT;
    stLayerAttr.u32DispFrmRt = 30;
    stLayerAttr.stDispRect.s32X       = 0;
    stLayerAttr.stDispRect.s32Y       = 0;
    stLayerAttr.stDispRect.u32Width   = 1920;
    stLayerAttr.stDispRect.u32Height  = 1080;
    stLayerAttr.stImageSize.u32Width  = 1920;
    stLayerAttr.stImageSize.u32Height = 1080;
    stLayerAttr.bDoubleFrame = HI_FALSE;
    stLayerAttr.bClusterMode = HI_FALSE;

    s32Ret = SAMPLE_COMM_VO_StartLayer(VoDev, &stLayerAttr);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("Start SAMPLE_COMM_VO_StartDevLayer failed!\n");
        goto END_2;
    }

    s32Ret = SAMPLE_COMM_VO_StartChn(VoDev,  enVoMode);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("Start SAMPLE_COMM_VO_StartChn failed!\n");
        goto END_3;
    }

    /* if it's displayed on HDMI, we should start HDMI */
    if (stVoPubAttr.enIntfType & VO_INTF_HDMI)
    {
        if (HI_SUCCESS != SAMPLE_COMM_VO_HdmiStart(stVoPubAttr.enIntfSync))
        {
            SAMPLE_PRT("Start SAMPLE_COMM_VO_HdmiStart failed!\n");
            goto END_4;
        }
    }

   VoChn = 0;
   VpssGrp = 0;
   s32Ret = SAMPLE_COMM_VO_BindVpss(VoDev, VoChn, VpssGrp, VPSS_CHN0);
   if (HI_SUCCESS != s32Ret)
   {
           SAMPLE_PRT("SAMPLE_COMM_VO_BindVpss failed!\n");
           goto END_4;
   }

    /******************************************
     step 5: start vi
    ******************************************/
    ViDev = 0;
    ViChn = 0;
    s32Ret = SAMPLE_COMM_VI_Mode2Size(SAMPLE_VI_MODE_4_1080P, enNorm, &stCapRect, &stDestSize);
    if (HI_SUCCESS !=s32Ret)
    {
        SAMPLE_PRT("vi get size failed!\n");
        goto END_5;
    }

    s32Ret = SAMPLE_COMM_VI_StartDev(ViDev, SAMPLE_VI_MODE_4_1080P);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("SAMPLE_COMM_VI_StartDev failed with %#x\n", s32Ret);
        goto END_5;
    }

    s32Ret = SAMPLE_COMM_VI_StartChn(ViChn, &stCapRect, &stDestSize, SAMPLE_VI_MODE_4_1080P);
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("call SAMPLE_COMM_VI_StarChn failed with %#x\n", s32Ret);
        goto END_6;
    }

#ifdef VBI_CASCADE
    s32Ret = SAMPLE_COMM_VI_Start_CascadeEX();
    if (HI_SUCCESS != s32Ret)
    {
        SAMPLE_PRT("call HI_MPI_VI_EnableCascadeChn failed with %#x\n", s32Ret);
        goto END_6;
    }

    /******************************************
     step 9: bind vi&vpss, vpss&vo ,set vo zoom in
    ******************************************/
        VpssGrp = 0;
        VoChn = 0;
        s32Ret = SAMPLE_COMM_VI_BindVpss(VI_CAS_CHN_1, VpssGrp, VPSS_CHN0);
        if (HI_SUCCESS !=s32Ret)
        {
                SAMPLE_PRT("vi 11(vichn=%d) bind vo(vodev=%d,vochn=%d) failed!\n", ViChn, VoDev, VoChn);
                goto END_7;
        }
#else

        VpssGrp = 0;
        VoChn = 0;
        ViChn = 0;
        // bind vi to vpss
        s32Ret = SAMPLE_COMM_VI_BindVpss(ViChn, VpssGrp, VPSS_CHN0);
        if (HI_SUCCESS !=s32Ret)
        {
                SAMPLE_PRT("vi 11(vichn=%d) bind vo(vodev=%d,vochn=%d) failed!\n", ViChn, VoDev, VoChn);
                goto END_6;
        }

#endif

    printf("press two enter to quit!\n");
    getchar();
    getchar();
    /******************************************
     step 10: unbind vpss&vo, vi &  vpss
    ******************************************/

END_8:

#ifdef VBI_CASCADE
        /*** unbind vi to vpss ***/
        VpssGrp = 0;
        s32Ret = SAMPLE_COMM_VI_UnBindVpss(VI_CAS_CHN_1, VpssGrp, VPSS_CHN0);
#else
        VpssGrp = 0;
        ViChn = 0;
        s32Ret = SAMPLE_COMM_VI_UnBindVpss(ViChn, VpssGrp, VPSS_CHN0);
#endif
    /******************************************
     step 11: stop vi cascade & vi
    ******************************************/
#ifdef VBI_CASCADE
END_7:
    s32Ret = SAMPLE_COMM_VI_Stop_CascadeEX(ViChn);
#endif
END_6:
    s32Ret = SAMPLE_COMM_VI_Stop(SAMPLE_VI_MODE_4_1080P);


END_5:
   /* for(i=0; i     {*/
        VoChn = 0;
        VpssGrp = 0;
        SAMPLE_COMM_VO_UnBindVpss(VoDev, VoChn, VpssGrp, VPSS_CHN0);
   /* }*/
END_4:
    SAMPLE_COMM_VO_StopChn(VoDev, enVoMode);
END_3:
    SAMPLE_COMM_VO_StopLayer(VoDev);
END_2:

    SAMPLE_COMM_VO_StopDev(VoDev);

    if (stVoPubAttr.enIntfType & VO_INTF_HDMI)
    {
        SAMPLE_COMM_VO_HdmiStop();
    }
END_1:

    /******************************************
    step 15: stop vpss
    ******************************************/

    SAMPLE_COMM_VPSS_Stop(u32GrpNum, VPSS_MAX_CHN_NUM/4);

END_0:
    SAMPLE_COMM_SYS_Exit();

    return HI_SUCCESS;
}


/******************************************************************************
* function    : main()
* Description : video preview sample
******************************************************************************/
int main(int argc, char *argv[]) {
        HI_S32 s32Ret = HI_FAILURE;

        /*if ((argc < 2) || (1 != strlen(argv[1]))) {
                SAMPLE_VIO_Usage(argv[0]);
                return HI_FAILURE;
        }*/
        signal(SIGINT, SAMPLE_VIO_HandleSig);
        signal(SIGTERM, SAMPLE_VIO_HandleSig);

        // s32Ret = SAMPLE_VIO_1080P();
        s32Ret = SAMPLE_ViCap_SingleProcess();
        /*switch (*argv[1]) {
        case '0': VI:8*1080P;VPSS VO:HD0(HDMI|VGA); VPSS VO:SD0(CVBS)
                s32Ret = SAMPLE_VIO_1080P();
                break;
        default:
                printf("input invaild! please try again.\n");
                SAMPLE_VIO_Usage(argv[0]);
                return HI_FAILURE;
        }*/

        //s32Ret = SAMPLE_VIO_VI_TEST();

        if (HI_SUCCESS == s32Ret)
                printf("program exit normally!\n");
        else
                printf("program exit abnormally!\n");
        exit(s32Ret);
}

#ifdef __cplusplus
#if __cplusplus
}
#endif
#endif /* End of #ifdef __cplusplus */





tqingguang6688

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tqingguang6688 2017-07-29 12:24:00
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:L没有人遇到过的吗?再顶一下

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tqingguang6688 2017-07-30 16:59:41
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~ # cat /proc/umap/vi
------------  info from master arm -------------

------------  info from slave arm -------------

[VIU] Version: [Hi3536_MPP_V2.0.6.0 B030 Release], Build Time: [Jan 13 2017, 17:53:39]

-----MODULE PARAM--------------------------------------------------------------
detect_err_frame drop_err_frame stop_int_level   max_cas_gap vi_vb_source
              10              0              0        28000            0

-----VI DEV ATTR---------------------------------------------------------------
Dev   IntfM  WkM  ComMsk0  ComMsk1    CLKM AD0 AD1 AD2 AD3   Seq   DPath DType DRev   bDllSlave
   0 BT1120S 1Mux ff000000   ff0000      UP  -1  -1  -1  -1  UVUV  ByPass   YUV    N           Y

-----VI HIGH DEV ATTR---------------------------------------------------------------
Dev  InputM  WkM  ComMsk0  ComMsk1 AD0 AD1 AD2 AD3   Seq CombM CompM ClkM  Fix FldP   DPath DType DRev

-----VI PHYCHN ATTR------------------------------------------------------------
PhyChn CapX CapY  CapW  CapH  DstW  DstH CapSel ScanM     SkipM Mirror Flip IntEn PixFom SrcRat DstRat SkipMEx SkipMExYMask SkipMExCMask
      0    0    0  1920  1080  1920  1080   both     P   SKIPNON      N    N    Y   sp420     30     30       N 0x0          0xa

-----VI PHYCHN STATUS 1----------------------------------------------------------
PhyChn BindDev  Way      IntCnt  VbFail  LosInt  TopLos  BotLos BufCnt  IntT  SendT  Field  Stride
      0     0     0           0       0       0       0       0      0     0      0 (null)       0

-----VI PHYCHN STATUS 2---------------------------------------------------------
PhyChn MaxIntT IntGapT MaxGapT OverCnt LIntCnt  ThrCnt AutoDis CasAutD  TmgErr      ccErrN    IntRat
      0       0       0       0       0       0       0       0       0       0           0         0

-----VI PHYCHN VBI ATTR---------------------------------------------------------
PhyChn   VbiId       X       Y   Local     Len CasErrN
      0       0     276      40  OddEnd      32       0
      0       1     276      40  OddEnd      32       0

-----VI CASCADE CHN ATTR---------------------------------------------------------
CasChn    Dev  PhyChn  SrcRat  DstRat
      1      0       0      30      30

-----VI CHN STATUS-------------------------------------------------------------
ViChn   bEnUsrP   FrmTime   FrmRate     SendCnt      SwLost     Depth    Rotate
     0         N         0         0           0           0         0      NONE
     1         N         0         0           0           0         0      NONE

-----VI CHN CALL VGS STATUS 1-------------------------------------------------
ViChn   UsrBgnNOk   UsrCancel    UsrEndOk     UsrCbOk     CvrBgnNOk   CvrCancel    CvrEndOk     CvrCbOk

-----VI CHN CALL VGS STATUS 2-------------------------------------------------
ViChn   OsdBgnNOk   OsdCancel    OsdEndOk     OsdCbOk      ScaleNOk   SclCancel    SclEndOk     SclCbOk

zhuangweiye

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zhuangweiye 2017-07-31 10:38:47
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[quote][url=forum.php?mod=redirect&goto=findpost&pid=56495&ptid=18189]tqingguang6688 发表于 2017-7-30 16:59[/url]
~ # cat /proc/umap/vi
------------  info from master arm -------------

[/quote]

先试一下 1080P@30

tqingguang6688

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tqingguang6688 2017-07-31 13:16:38
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问题解决,是硬件电路一个隐藏的电阻没焊接,上面配置和程序是正常的。回个帖让同行少走弯路

wangwu1976

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wangwu1976 2017-08-02 10:15:47
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解决了就好。谢谢分享

Echo

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Echo 2017-09-07 17:07:37
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谢谢楼主分享,我们也在调试adv7842;楼主能分享下sample_vio demo么
或将文件直接拖到这里
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